Design Algorithms:

  • Design Algorithms
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  • 1. Processor Pin Multiplexing

    a. Automatic pin selection of processor pins in the requirement generator.
    b. If the design cannot be generated then the error is generated.

  • 2. Power analysis and component selection

    a. Parsing of Power sequencing requirement of multiple components present in design.
    b. Synthesize the power supply sequence of various bill of material components
    c. Optimize the power voltages of various components to produce an optimal voltage set which is needed as per power sequencing.
    d. Selection of power components to produce best efficiency rating.
    e. Selection of non-programmable power sequence device for generating the power sequencing step.
    f. DDr3/L power supply component selection.
    g. Able to parse any design without any power sequencing need.
    h. Able to supply power to any custom connector as needed by board.
    i. Able to generate power designs from 3.3V to 26V for various current demand needs.
    i. Step down regulators
    ii. LDO’s
    iii. Step up regulators.

  • 3. Single and Differential clock synthesis

    a. Parse the clock requirement
    b. Synthesize the clock to find the most optimal clock frequency.
    c. Selection of crystal, clock oscillators, and clock buffers as needed for single and differential clock requirement.

  • 4. Reset synthesis

    a. Parse the reset requirement of the board
    b. Allow resets to be propagated from
    i. Reset generator
    ii. Jtag header
    iii. Any custom reset generator device.
    c. The reset would reset processor and peripheral on the board.
    i. Voltage conversion as per IO standard
    d. Power on configuration for the processor and peripherals assertions during reset.

  • 5. Discrete component Selection

    a. Parses the capacitor, resistor, inductor ,ferrite beads and mosfet requirements and automatically finds parts for these components.

  • 6. Planned development

    a. Additional Features:
    i. Add additional parts for the power, clock and reset.
    ii. Provide features to allow multiple power supplies to be sourced from multi output regulator
    iii. Provide option in requirement generator to select various parts of the power, clocks and resets.
    iv. Provide multiple power and reset distribution topologies.
    1. POE
    2. USB 2.0/3.0